1. Field of the Invention
This invention relates to a semiconductor storage device featuring the improved construction of the cell plate electrode of the memory cell capacitor. There has been a progressive increase in the device density in integrated circuits of dynamic RAMs and consequently, minute processing is required in this field.
2. Description of the Related Art
Normally, a memory cell capacitor used in a dynamic RAM comprises a semiconductor substrate, an insulator coating formed on the substrate, and a cell plate electrode made of a polysilicon layer, for example, formed on the insulator coating. FIG. 1 is a plan view showing a part of the integrated circuit pattern of a conventional RAM. Cell regions 8, in a long and substantially hexagonal shape where circuits are arranged, are formed in the semiconductor substrate as described below.
Plural cell regions 8 are formed by a photolithographic technique, for example, with their longitudinal directions aligned with the direction of a first row in such a way that they look as if they are windows on the substrate. In the next row, cell regions 8 are formed such that they are placed in those positions of this next row which correspond to the positions of the first row where there are no cell regions between cell regions 8. As a result, plural cell regions 8 are formed alternately for a plurality of rows on the substrate and they look like windows disposed in a matrix arrangement.
Referring to FIG. 1, in the area of a row where there is no cell region 8, cell capacitors 1 and 2 are formed facing each other and are separated by a specified distance. In those areas of the adjacent rows which are located on both sides of cell region 8 in the row having cell capacitors 1 and 2, cell capacitors 3 and 4, 5 and 6 are disposed.
As mentioned earlier, cell plate electrode 7 is placed on the memory cell capacitors. In FIG. 1, cell plate electrode 7 is located on cell capacitors 3, 4, 5 and 6. Cell plate electrode 7 on cell capacitors 1 and 2 which face each other continues to the cell plate electrode on cell capacitors 3, 6 and 4, 5 on the adjacent rows and on the diagonal lines prolonged from oppose cell capacitors 1 and 2.
The hiderances in the way of further increasing the circuit density of conventional dynamic RAMs are as follows.
As described above, cell plate electrode 7 conventionally covers from aforementioned cell capacitors 1 and 2 to other cell capacitors 3, 6 and 4, 5 on the adjacent rows and on the prolonged diagonal lines. Therefore, cell plate electrode 7 occupies a very large area, limiting the circuit areas for cell regions 8. Conventionally, cell regions 8 have in a long hexagonal shape and are disposed on the semiconductor substrate like windows scattered thereon. It has been difficult to form cell regions in such a shape by photolithographic techniques and more difficult to make them in reduced shapes.